Field of the Invention
This invention relates to a device for generating a fractional frequency of a reference frequency, that is, a device for generating a frequency (n/p)f from a frequency f in which n and p are integers.
Devices of this type are employed in particular in digital electronic systems. In fact, these systems usually require a series of clock signals and synchronization signals having predetermined frequency and phase relationships. In point of fact, the frequencies of clock signals to be generated are not always integral multiples or submultiples of the reference clock signal. However, in the majority of cases, the frequencies of the clock signals to be generated are fractions of the reference clock frequency and are given by the following equation: EQU F=(n/p)f
where f is the reference clock frequency and n and p are integers greater than or equal to 1.
Description of the Prior Art
There at present exist a number of different solutions for obtaining a frequency F=(n/p)f from a frequency f.
Among these solutions, those which are in most common use are the phase-locked loop and the LCM (lowest common multiple) frequency.
As shown in FIG. 1, the phase-locked loop is constituted in known manner by a generator 1 for producing a frequency f, the output of which is connected to a frequency divider 2 for dividing by the integer p in order to obtain a signal having a frequency f/p which is sent to one of the inputs of a phase comparator 3. Said loop also comprises a voltage-controlled oscillator 4 which delivers a signal having a frequency f' and which, after digitization within the circuit 5, is introduced into a frequency divider 6 which divides by the integer n. The signal f'/n at the output of the divider 6 is sent to the other input of the phase comparator 3 which delivers at the output a signal containing in particular .vertline.f'/n-f/p.vertline.. This signal is sent to a low-pass filter 7 in order to obtain at the output solely the signal which is representative of the error and controls the oscillator 4, thereby modifying the frequency f'. In this case, since the loop is closed, we have f/p=f'/n, whence f'=(n/p)f.
It is thus possible to obtain at the output of the wave-shaping circuit a clock signal having the frequency f'=(n/p)f.
However, the phase-locked loop has the disadvantage of being formed by circuits of the analog type entailing the need for supply voltages which are different from the single supply voltage required for the digital circuits.
The other conventional solution lies in the use of the LCM frequency.
The device which permits the use of this frequency is of simple design and has recourse to digital circuits. In fact, as shown in FIG. 2, the device is essentially constituted by three frequency dividers, namely a first divider 8 which utilizes the LCM frequency n k f of the frequencies to be generated in order to carry out a first division by the integer k. The device is then constituted by two dividers 9, 10 which are mounted in parallel and divide respectively the frequency n f obtained at the output of the divider 8 by the integer n in order to obtain the reference frequency f and by the integer p in order to obtain the fractional frequency (n/p)f. However, when using this device, the LCM frequency of the frequencies to be generated must be available whereas this is not always possible.